Scheme of Designing Pc1o4 Bus Radar Signal Display Card

introduction

PC104 bus radar signal display card applies the virtual instrument technology based on PC104 bus to the signal display in the general radar embedded diagnosis combination. It is of great significance to improve the fault detection mode of radar equipment. Through the analysis of signal waveform display principle and display method, the specific practical scheme is determined, and the design of functional circuit is completed; The interface protocol and logic control circuit of PC104 bus are realized by using special interface chip and CPLD. Finally, the relevant software program is written; The display card can work stably in the actual test process and meet the design index requirements. Therefore, the function of the display card is directly related to the final completion of the whole system.

1 system hardware design and Implementation

As shown in Fig. 1, the hardware circuit of the display card is mainly composed of input matching network, analog-to-digital conversion unit, clock generation circuit, timing generation circuit, control signal generation module and display unit.

After buffered and amplified, the input analog signal enters the analog-to-digital converter ad9054, with a maximum sampling rate of 200ms / s and an analog input bandwidth of 380mhz. It has two acquisition data output ports (Port A and port B), and single port output or dual port alternating ping-pong output can be selected. The data output after a / D conversion is locked by two latches to meet the high-speed writing of subsequent memory.

As shown in Fig. 1, the system timing generation control circuit generates the system clock and coordinates the working steps of each part of the system. It generates the latch clock of the latch according to the requirements of the A / D conversion sampling clock and the timing of the output interface of the A / D converter, and provides the read-write pulse of the memory with an appropriate delay. The timing generation circuit also provides a counting clock of an address generator and a recording length counter. After the system is initialized, the A / D conversion starts, and the collected data is continuously written into the memory. At this time, the timing generation circuit only provides the clock source to the address generator to make it perform " 1" operation, so that the memory address is incrementally reversed. When the trigger logic is triggered, the timing generation circuit enables the recording length counter to work, and provides the sampling clock as the counting clock source. When the recording length counter reaches the recording length set by the user, the timing generation circuit turns off the clock switch to stop the memory from turning over, and applies for data transmission to the PC. When the PC reads the collected data in some form, the timing generation circuit provides the memory readout address reversal clock according to the PC104 bus reading operation, and reads out the contents of the memory in the reverse order of the acquisition records.

The logic contained in the dotted box in Figure 1 is integrated into a large-scale high-speed programmable logic device ep1k30. The trigger logic, record length counter and address generator cooperate closely to make the system work in the set way. The trigger mode is triggered by software. Once the oscilloscope card runs, it will automatically and continuously grab the waveform; External input trigger requires an external input TTL logic signal, and the logic signal to be set will trigger when it arrives; The signal level trigger is generated when the amplitude value of the collected signal reaches or exceeds the set level value. The realization of signal level trigger monitors the output result of a / D converter in real time through high-speed logic signal comparator, and triggers when the comparison result is greater than or less than the set reference value. In order to achieve the expected trigger, the address generator and the record length counter are used in combination with each other. The address generator is essentially a bidirectional ring counter. As shown in Fig. 2, it writes the address increasing data clockwise and reads the address decreasing data counterclockwise.

The computer sets the working mode of the display card and reads the collected data through PC104 bus. For the simultaneous use of multiple channels, each display card has a channel number. After the software sets the status of each channel one by one, it can be triggered at the same time or separately. The external trigger input of each channel can be used for multi-channel sampling and recording at the same trigger time. PC can communicate with oscilloscope card or read sampling data through I / O, DMA, interrupt and other methods.

2 system software design

The whole structure of the display card is composed of PC104 bus interface circuit and function circuit, and the function circuit is the core, so the programming of MCU software is also a very important part. The program of single chip microcomputer is written in C language. The main structure is as follows:

(1) Communication program with host computer. It includes reading the command of the upper computer, transmitting the test data to the upper computer and reporting the status of the functional circuit.

(2) Function. It includes AD acquisition program, range setting, reset, automatic zero adjustment, self-test, interrupt service program, etc.

Therefore, the display card software consists of a main program and an interrupt program, and the program is shown in block diagram 3 and Figure 4.

The main program completes the development of a data area consistent with the remote control frame format, the initialization of the chip, and the sending and receiving of serial asynchronous data. During serial asynchronous data transmission and reception, MPU will close interrupts O and 1, but this will not affect MPU's corresponding and processing of keys. When 82c79 detects that a key is pressed, it can either apply for interruption and be processed within the time gap after data transmission, or wait for 30ms, and then request interruption and be processed. The extra 30ms is much less than the time interval of the next key (at least hundreds of milliseconds), so the process of closing the interrupt does not affect the processing of the key.

In interrupt program / INT0, MPU will read the key value in 82c79 and judge the key type. When the key is an ordinary key, MPU does not change the working mode of 82c79, only fills the instruction code corresponding to the key into the corresponding byte bit of the data area, and assigns R4 to #01h. When the key is the "long press" key, the MPU will immediately change the working mode of 82c79 and set it to the sensor scanning working mode after filling the command code into the corresponding byte bit of the data area. When the "long press" key is disconnected, 82c79 can notify MPU through IRQ signal again due to the change of sensor matrix. When entering the interrupt program again, MPU changes the working mode of 82c79 back to the keyboard scanning mode, and then assigns R4 value #01h. Thus, a complete key pressing process is completed. For the "long press" key matched with the knob switch, when the key is closed, the MPU also needs to turn on the A / D conversion; When the key is disconnected, the MPU will turn off the A / D conversion.

In the interrupt program to, every two interrupts, i.e. 80ms (the working frequency of MPU determines that its maximum timing cannot reach 80ms), MPU will set the serial data transmission pointer.

conclusion

Solve the bottleneck problem of PC104 bus data transmission and allocate hardware resources reasonably. The outstanding advantage of PC104 bus is its simple structure and easy development, but its transmission rate is slow. The practical application shows that the design of radar signal display card based on PC104 bus can overcome the above design defects, especially can fully meet the requirements of portable design characteristics and meet the requirements of maintenance training.

Scheme of Designing Pc1o4 Bus Radar Signal Display Card 1

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